The present invention relates generally to semiconductor power device technology, and more specifically to field effect transistors (FETs) with improved scalability and performance.
In order to achieve low cost manufacturing and high performance power transistors, the feature size of power transistors is continuously being reduced. One hurdle in shrinking the trench power field effect transistors (FETs) is the presence of the heavy body structure in the body region which is needed to ensure a robust unclamped inductive switching (UIS) performance. In one approach, heavy body recesses have been used to obtain a deeper heavy body structure. After the heavy body region is formed through the heavy body recess, a thin TiN barrier layer lining the heavy body trench is deposited. A thick Al metal film filling the heavy body trench is deposited using physical vapor deposition (PVD). PVD is used mainly because metal films deposited using PVD have high purity and thus low film resistance.
However, the continued shrinking of the cell pitch results in an increase in the aspect ratio of the heavy body recess which makes it difficult to properly fill the heavy body recess. PVD may no longer work to fill such high aspect ratio heavy body recesses because the overhang at the top corners of the heavy body recesses becomes more pronounced. As a result, the PVD film eventually closes up the recess and forms voids in the recesses which deteriorate the contact resistance and thus the UIS performance of the transistor. Chemical vapor deposition (CVD) of metal films is capable of resolving the problems caused by PVD, but the carbon contamination from the organo-metallic precursor in CVD processes causes a high film resistance, and a high temperature annealing is required for a good metal-silicon contact (silicidation).
Thus, there is a need for techniques which enable scaling of the transistor while providing improved performance.